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COMEC 2009 >
Please use this identifier to cite or link to this item:
http://hdl.handle.net/123456789/1195
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| Title: | SYNTHESIS OF ASYNCHRONOUS DIGITAL SYSTEMS |
| Authors: | TIMIS, M
VALACHI, Al |
| Keywords: | Digital logic, FSM, Locally Clock,
Fluence Graph, D Latch,
Transition Table. |
| Issue Date: | 2009 |
| Publisher: | Transilvania University Press of Braşov |
| Citation: | Google Scholar |
| Series/Report no.: | COMEC 2009;789-794 |
| Abstract: | In present paper, the authors proposed a method for synthesis of the asynchronous digital systems using locally clock,
[1]. In the design of the system are used different types of logic components as D type latches, logic gates. The entire system works
fully asynchronous, means that it has no clock signal. |
| URI: | http://hdl.handle.net/123456789/1195 |
| ISBN: | 978-973-598-572-1 |
| Appears in Collections: | COMEC 2009
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